MAX II Product Backgrounder
Introduction
Building on nearly fifteen years of CPLD leadership and innovation, Altera introduces
the MAX
®
II family, the industry’s lowest-cost CPLDs. At half the cost of competing
CPLDs, MAX II devices are based on a new look-up table (LUT)-based
architecture that
delivers the lowest cost per I/O pin on the market and breaks new ground in CPLD
architectures. This instant-on, non-volatile device family targets general-purpose, low-
density logic applications, enabling designers to leverage the benefits of industry leading
CPLD devices in lieu of small ASICs and ASSPs, which are costlier and less flexible.
Built on a cost-optimized 0.18-µm flash process with six metal layers, MAX II devices
operate at approximately one-tenth the power of the previous-generation of MAX
devices. They offer densities ranging from 240 to 2,210 logic elements (LEs) (192 to
1,700 equivalent macrocells) and up to 272 user I/O pins. Table 1 describes some of the
highlights of MAX II devices, and Table 2 lists available packages.
MAX II Key Features
MAX II devices include many new features that take advantage of the technology
innovations that Altera’s legacy is built on. The device family was specifically designed
to reduce costs for both new and traditional CPLD applications.
Important MAX II features include:
•
One-tenth the Power Consumption of Prior CPLD Families
—The MAX II
devices have the lowest dynamic power in the industry, which results in the
lowest operating power consumption. For mission critical designs, MAX II
devices beat competing low-power products for battery life. Furthermore, the
MAX II family consumes one-tenth the power of the low-cost MAX 3000A
family.