Description
3D7220S-700 DATA DELAY MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220) ACTIVE DELAY LINE, TRUE OUTPUT, PDSO16 MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220) ACTIVE DELAY LINE, TRUE OUTPUT, PDSO14
The 3D3225 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap (incremental) delay values can range from 0.75ns through 700ns. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number. The 3D3225 is TTL- and CMOS- compatible, capable of driving ten 74LS-type loads, and features both rising- and falling-edge accuracy.
CMOS technology
• 3.3V operation
• Vapor phase, infrared, and wave soldering
• Programmable via latched parallel interface
• Incremental range: 0.25ns to 800us
• Pulse width tolerance: 1% (see Table 1)
• Supply current: 8mA typical
• Temperature stability: ±1.5% maximum (-40°C to 85°C)
• Vdd stability: ±1.0% maximum (3.0V to 3.6V)
Specs: Data-Delay-DSA-554813
