Description
SPECIFICATIONS
Part #: HI-6130PQTF
Part Category: Microprocessors/Microcontrollers/Peripheral ICs
Manufacturer: Holt Integrated Circuits, Inc.
Description: 2 CHANNEL(S), 1Mbps, MIL-STD-1553 CONTROLLER, PQFP100
Mfr Package Description ROHS COMPLIANT, PLASTIC, QFP-100
REACH Compliant Yes
EU RoHS Compliant Yes
Status Active
Microprocessor/Microcontroller/Peripheral IC Type SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553
Address Bus Width 16.0
Boundary Scan NO
Clock Frequency-Max 50.005 MHz
Communication Protocol MIL STD 1553B; MIL STD 1760
Data Encoding/Decoding Method BIPH-LEVEL(MANCHESTER)
HI-6130PQTF Holt Integrated CircuitsOperation from 3.3 V. The bus controller, monitoring terminal and two remote terminals can function simultaneously. Built-in dual transceivers. 32K x 16 RAM with additional definition / error correction, 16-bit parallel interface of the main processor.
BRIEF DESCRIPTION OF THE BUILT-IN TERMINALS HI-6130
3.3V CMOS HI-613x device provides a complete single or multi-functional interface between the host processor and the MIL-STD-1553B bus. Each IC includes a bus controller (BC), a bus monitoring terminal (MT), and two independent remote terminals (RTs). Any combination of functions contained in 1553 can be used to work in parallel mode. The terminals involved interact with the MIL-STD-1553 buses via a transceiver of an integrated dual bus and an external transformer. The user distributes 64Kbytes of built-in static RAM between devices to meet application requirements.
To access the main processor to internal registers and static RAM, the HI-6130 uses a 16-bit parallel bus. There are different versions of the case, depending on the number of I / O pins of the main processor interface.
Programmable interrupts inform the main processor of the status of the terminal. Circular data stacks in RAM have transformable and programmable interrupt “I” of the achieved level. “
The built-in HI6130 terminal can be configured for automatic self-initialization after a reset. A dedicated SPI port reads data from an external serial EEPROM to fully configure the registers and RAM for any subset of one to four terminals.
CHARACTERISTICS OF THE BUILT-IN TERMINALS HI-6130
Simultaneous operation of many terminals from one to four MIL-STD-1553B functions: bus controller, monitoring terminal and two independent remote terminals;
Two options for the main processor interface: a 16-bit parallel bus for higher speed or a 4-wire SPI for a smaller footprint and fewer connecting cables;
Internal static RAM 64 KB;
The autonomous operation of the terminal requires minimal intervention by the main processor;
The common bus interface 1553 reduces the complexity of the circuit and the area of ??the PCB;
Fully programmable bus controller with a set of commands of 28 operation codes;
The bus monitor can operate in a two-stack mode, separately recording commands and data, with a 16-bit or 48-bit time switch;
The bus monitor can record commands and data in single-shot mode using the IRIG-106 packet format;
A single-monitor bus monitor can additionally generate complete IRIG-106 data packets, including full headers and packet trailers;
Independent 16-bit time counters and synchronization clock sources for all terminals. The bus controller and monitor also have the functions of a 32- and 48-bit time counter, respectively;
The interrupt register buffer for 64 words organizes a queue of the last 32 interrupts. The interrupt decryption provided by the hardware quickly determines the sources of interrupts;
Function of the RAM of error detection / correction;
Built-in self-monitoring for protocol logic, digital signal paths and internal RAM;
Additional self-initialization during reset uses an external serial EEPROM;
Protection against electrostatic discharge 8 kV (HBM standard, all conclusions);
Two temperature ranges: from -40C to + 85C or from -55C to + 125C with additional thermoelectro-recovery;
Lead-free design in accordance with RoHS.
Manufacturer:Electronic Components
Datasheet:hi-6130pqtx_v-30.ibs
